Items where Subject is "Semiconductor Devices > IC Design"

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Number of items at this level: 34.

A

Agrawal, R and Mehrotra, R and Mandal, AS (2012) Neural Self-Organization Based 3D Rectilinear Steiner Minimal Tree Generation. In: IEEE UK Sim 14th International Conference on Modelling and Simulation (IEEE UKSim 2012), March 28 - 30, 2012, Cambridge University, UK. (Submitted)

B

Bansal, R and Jatav, MK and Karmakar, A (2017) A Lifting Instruction for Performing DWT in LEON3 Processor based System-on-Chip. In: 21st VLSI Design and Test Symposium (VDAT-2017), 29 June 2017 - 02 July 2017, Roorkee. (Submitted)

Bansal, R and Karmakar, A (2019) Efficient closely-coupled integration of AES coprocessor with LEON3 processor. In: 23rd International Symposium on VLSI Design Test (VDAT-2019), July 04-06, 2019, IIT Indore, India.

Behera, KC and Santosh, M and Bose, SC (2010) Design of a 10-bit, 5 Ms/S Pipelined ADC for CMOS Image Sensor. In: 14th VLSI Design and Test Symposium (IEEE/VSI VDAT 2010), July 7-9, 2010, Chitkara University Campus, Himachal Pradesh. (Submitted)

G

Gupta, AK and Agarwal, PB and Kumar, A (2010) Design and Simulation of Single Electron Inverter for Room Temperature Operation. In: International Conference on Nanoscience & Technology (ICONSAT-2010), February 17-20, 2010, IIT, Bombay, Mumbai. (Submitted)

Gurjar, N and Singh, R and M. Hossain, A and Anitha, VP and Kumar, N (2018) Simulation Study of High Current Density Miniaturized Pseudospark Based Sheet Electron Beam Source. In: 33rd National Symposium on Plasma Science & Technology, -2018, December 4-7, 2018, Delhi. (Submitted)

H

Hari, GR and Bose, SC (2012) Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology. In: International Conference on Electronic Design and Signal Processing (ICEDSP - 12), December 20-22, 2012, MIT, Manipal. (Submitted)

K

Kishore, K and Pesala, B and Santosh, M and Bose, SC and Akbar, SA (2019) IoT Platform to augment Solar Tree as Smart Highway Street Light with Ambient Monitoring Capability. In: 10th International Conference on Computing, Communication and Networking Technologies (ICCCNT), July 6-8, 2019, IIT Kanpur, India.

Kumar, N and Gudlavalleti, RH and Bose, SC (2017) An Improved Highly Efficient Low Input Voltage Charge Pump Circuit. In: 21st VLSI Design and Test Symposium (VDAT-2017), 29 June 2017 - 02 July 2017, Roorkee. (Submitted)

L

Louis, VJ and Pandey, JG (2019) A Novel Design of SRAM using Memristors at 45 nm Technology. In: 23rd International Symosium on VLSI Design and Test (VDAT-2019), July 04-06, 2019, IIT Indore, India.

P

Pandey, JG (2018) A High-performance VLSI Architecture of the PRESENT Cipher and Its Implementations for SoCs. In: 31st IEEE International System-on-Chip Conference, September 4-7, 2018, Arlington, Washington DC. (Submitted)

Pandey, JG and Karmakar, A and Shekhar, C (2012) Platform-Based Design Approach for Implementing Real-Time Image and Video Processing Applications. In: International Conference on Electronics Computer Technology (ICECT-2012), April 6 - 8, 2012, Kanyakumari, India. (Submitted)

Pandey, JG and Goel, T and Karmakar, A (2017) An Efficient VLSI Architecture for PRESENT Block Cipher and its FPGA Implementation. In: 21st VLSI Design and Test Symposium (VDAT-2017), 29 June 2017 - 02 July 2017, Roorkee. (Submitted)

Pandey, JG and Gupta, S and Karmakar, A (2020) A Unified Architecture for AES/PRESENT Ciphers and its Usage in an SoC Environment. In: 11th IEEE Latin American Symposium on Circuits and Systems (LASCAS-2020), February 25-28, 2020, San Jose, Costa Rica.

Pandey, JG and Karmakar, A (2020) A VLSI Implementation of the PRESENT Cipher for System-on-Chip Applications. In: 33rd International Conference on VLSI Design & 19th International Conference on Embedded Systems, January 04-08, 2020, Banglore, Karnataka.

Pandey , JG and Godel , T and Nayak , M and Mit harwa , C and Khan, S and Santosh, K and Singh, R and Karma, V and Karmakar, A (2018) A VLSI Architecture for the PRESENT Block Cipher with FPGA and ASIC Implementations. In: 22nd International System on VLSI Design and Test (VDAT ), June 28-30, 2018, Tamil Nadu. (Submitted)

R

Rajput, KK and Saini, AK and Bose, SC (2010) DC Offset Modeling and Noise Minimization for Differential Amplifier in Subthreshold Operation. In: IEEE Computer Society Annual Symposium on VLSI, July 5-7, 2010, Lixouri Kefalonia, Greece. (Submitted)

S

Saini, AK and Bhadauria, A (2013) CMOS Compatible RF MEMS based FBAR for Wireless applications: Design, Model and Simulation. In: First National Conference on Recent Developments in Electronics ( NCRDE 2013), January 18-20, 2013, University of Delhi, New Delhi. (Submitted)

Saini, AK and Rajput, KK (2012) A ±0.6V Low Input Offset, Low Noise Folded Cascode Operational Amplifier for Bio-Medical Applications. In: International Conference on Electronic Design and Signal Processing (ICEDSP - 09), December 10-12, 2012, MIT, Manipal. (Submitted)

Santosh, M and Bansal, A and Mishra, J and Behra, KC and Bose, SC (2017) Characterization and Compensation Circuitry for Piezo-Resistive Pressure Sensor to Accommodate Temperature Induced Variation. In: 21st VLSI Design and Test Symposium (VDAT-2017), 29 June 2017 - 02 July 2017, IIT Roorkee. (Submitted)

Santosh, M and Behera, KC and Bose, SC (2009) Design of Pseudo Flip-around Sample- Hold Circuit for 10-bit, 5-Msamples/Sec Pipeline ADC. In: International Conference on Emerging Trends in Electronics & Photonic Devices & Systems (ELECTRO-2009), December 22-24, 2009, BHU, Varanasi. (Submitted)

Santosh, M and Behera, KC and Bose, SC (2012) Design of an On-Chip Read-out Circuit for Piezo-Resistive MEMS Pressure Sensor. In: International Conference on Devices, Circuits and Systems (ICDCS - 12), March 15 - 16, 2012, Coimbatore, India. (Submitted)

Saurav, S and Saini, AK and Singh, S and Saini, R and Gupta, S (2015) VLSI Architecture of Pairwise Linear SVM for Facial Expression Recognition. In: 4th International Conference on Advances in Computing, Communications & Informatics(ICACCI-2015), August 10-13, 2015, SCMS, Aluva, Kochi. (Submitted)

Saurav, S and Saini, R and Singh, S and Saini, AK and Sharma, Nidhi (2015) Analyzing Hardware Constraints of Gabor Filtering Operation for Facial Expression Recognition System. In: 4th International Conference on Advances in Computing, Communications & Informatics(ICACCI-2015), August 10-13, 2015, SCMS, Aluva, Kochi. (Submitted)

Saurav, S and Singh, S and Saini, AK and Saini, R and Gupta, S (2015) VLSI Architecture of Exponential Block for Non-Linear SVM Classification. In: 4th International Conference on Advances in Computing, Communications & Informatics (ICACCI-2015), August 10-13, 2015, SCMS, Aluva, Kochi. (Submitted)

Saurav, S and Singh, S and Saini, R and Saini, AK and Sharma, N (2015) A Comparative Analysis of Various Image Enhacement Techniques for Facial Images. In: 4th International Conference on Advances in Computing, Communications & Informatics(ICACCI-2015), August 10-13, 2015, SCMS, Aluva, Kochi. (Submitted)

Sharma, H and Saurav, S and Singh, S and Saini, AK and Saini, R (2015) Analyzing Impact of Image Scaling Algorithms on Viola-Jones Face Detection Framework. In: 4th International Conference on Advances in Computing, Communications & Informatics(ICACCI-2015), August 10-13, 2015, SCMS, Aluva, Kochi. (Submitted)

Sharma, HD and Pal, T (2010) Image based Online Tracking and Control of Nano-Manipulator for Collision Avoidance in Micro/Nano Assembly. In: 36th Annual Conference of IEEE Industrial Electronics (IECON-2010), November 7-10, 2010, Phoenix, Arizona, USA. (Submitted)

Sharma, HD and Pal, T (2010) Nonlinear Characterization of Microcantilever based Force Sensor using Nanomanipulator System. In: 36th Annual Conference of IEEE Industrial Electronics (IECON-2010) , November 7-10, 2010, Phoenix, Arizona, USA. (Submitted)

Singh, S and Dunga, SM and Mandal, AS and Shekhar, C and Vohra, A (2010) Moving Object Tracking using Object Segmentation. In: International Conference on Advances in Information and Communication Technology, September 07-09, 2010, Kochi, Kerala. (Submitted)

Singh, S and Saurav, S and Saini, R and Mandal, AS and Chaudhury, S (2017) FPGA-based Smart Camera System for Real-time Automated Video Surveillance. In: 21st VLSI Design and Test Symposium (VDAT-2017), 29 June 2017 - 02 July 2017, Roorkee. (Submitted)

Singh , J and Kumar, R and Sinha, A and Das, S and Arout, CJ and Panwar, DK (2018) Fabrication and Characterization of Magnetostrictive Micro-cantilevers. In: IEEE Sensors 2018 Conference , October 28-31, 2018, New Delhi. (Submitted)

Singhal, N and Santosh, M and Bose, SC (2019) Reconfigurable Digital Logic Gate based on Neuromorphic Approach. In: 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID-2019), January 5-9, 2019, New Delhi, India.

Srivastava, A and Mohapatra, P and Mandal, AS (2012) Efficient Application of Gabor Filters with Non-Linear Support Vector Machines. In: International Conference on Advances in Communication, Network and Computing Technologies (CNC - 2012), February 24 - 25, 2012, Chennai, India. (Submitted)

This list was generated on Sun Sep 25 13:59:13 2022 IST.