A High-performance VLSI Architecture of the PRESENT Cipher and Its Implementations for SoCs


Downloads per month over past year

Pandey, JG (2018) A High-performance VLSI Architecture of the PRESENT Cipher and Its Implementations for SoCs. In: 31st IEEE International System-on-Chip Conference, September 4-7, 2018, Arlington, Washington DC. (Submitted)

PDF - Submitted Version
Download (4Mb) | Preview


Abstract-The essence of internet-of-things (loT) and cyber­ physical systems (CPS) infrastructures are primarily based on the privacy and security of communicated data. In these resource­ constrained applications, lightweight cryptography plays a vital role in data security. In this paper, we propose a high­ performance and power-efficient VLSI architecture for the PRESENT block cipher and its integration in a system-on-chip (SoC) environment. The architecture is based on an 8-bit datapath and requires 48 clock cycles for processing of 64-bit plaintext and 128-bit key. The architecture is validated using the Xilinx Virtex-5 xc5vfx50 FPGA device, where it consumes 84 slices, provides 379.78 MHz maximum frequency and 506.37 of Mbps throughput. It consumes 36.57 mW of dynamic power, 57.95 nJ energy and provides 0.91 nJ/bit energy/bit. In comparison to an exiting architecture, the proposed architecture provides much-improved performance. Further, an ASIC implementation of the architecture is done in SCL 180 nm technology for its usage as an intellectual-property (IP) core in SoCs. The core consumes 1785, 2-input NAND gate equivalent (GE), with 1.55 mm2 area and can be operated up to 448 MHz clock frequency. At 100 MHz clock frequency, 0.273 mW of total power dissipation, 133 Mbps throughput, 130 nJ energy and 16.36 nJ/bit energy/bit is obtained. Index Terms-Lightweight cryptography; PRESENT block ci­ per; VLSI architectures; ASIC; SoCs.

Item Type: Conference or Workshop Item (Paper)
Subjects: Semiconductor Devices > IC Design
Divisions: Semiconductor Devices
Depositing User: Mr. Rabin Chatterjee
Date Deposited: 27 Jul 2021 09:44
Last Modified: 27 Jul 2021 09:44
URI: http://ceeri.csircentral.net/id/eprint/378

Actions (login required)

View Item View Item