In-situ Passivated GaN on Si HEMT for High Voltage Applications


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Kachhawa, P and Mishra, S and Jain, AK and Thakur, RR and Singh, K and Chaturvedi, N (2019) In-situ Passivated GaN on Si HEMT for High Voltage Applications. In: XXth International Workshop on Physics of Semiconductor Devices (IWPSD-2019), December 17-20, 2019, Novotel Hotel & Residences, Kolkata, India.

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GaN based HEMT devices are well known for their less frequency dependent switching losses, high breakdown electric field, high switching speed, high current density in high power and high frequency applications. GaN based HEMT on Si substrate provides a cost effective, reliable and highly manufacturable platform [1]. In this paper, we are reporting on the in-situ passivated GaN on silicon technology for various high voltage applications like Electrical vehicle automobile industry, aircraft electronics, satellite applications, electric motor controllers etc. [2]. The GaN on Si HEMT devices were fabricated for high voltage applications which consists of 650 µm thick silicon substrate, a GaN buffer layer of 3.9 µm epitaxially grown over substrate using MOCVD. This was followed by higher band gap material A1GaN (Al composition=0.25) of 20nm to generate the two-dimensional electron gas (2DEG) channel. In order to reduce gate leakage and to increase the Schottky barrier height a GaN cap layer of 2nm is also epitaxially grown followed by in-situ grown nitride passivation layer. The ohmic contacts were optimized and we achieved a very good contact resistivity of 2.5x10-6ohm-cm2 and a sheet resistance of 350 ohms/square followed by a very crucial step of passivation layer etching. Isolation process has been optimized using Boron, Nitrogen and Argon implant which results into a very good isolation resistance of 5x10 Ohms/sq. at 100 volts (as shown in Fig. 1). A mobility of 1670 cm2/V-sec and a carrier concentration of 1.286e+13 /cm2 was measured using hall-effect measurement system. The fabricated GaN HEMT on Si showed a device saturated current (IDSS) of 300 mA/mm at Vgs= 2 volts and a peak trans conductance (Gm) of 110 mS/mm. 3-terminal Breakdown voltage was measured by biasing the gate near to pinch off. We achieved a breakdown voltage over 210 Volts (Resource limitation) in depletion mode (as shown in Fig. 2). Device survived without any sign of breakdown and can withstand even higher voltages.

Item Type: Conference or Workshop Item (Paper)
Subjects: Semiconductor Devices > Sensors and Nanotechnology
Divisions: Semiconductor Devices
Depositing User: Mr. Jitendra Nath Bajpai
Date Deposited: 10 Sep 2021 11:31
Last Modified: 10 Sep 2021 11:31

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