Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology

Hari, GR and Bose, SC (2012) Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology. In: International Conference on Electronic Design and Signal Processing (ICEDSP - 12), December 20-22, 2012, MIT, Manipal. (Submitted)

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Abstract

In this paper the design of a low power 10-bit segmented current steering DAC for instrumentation applications is presented. The static performance of segmented DAC depends upon the matching of current sources. The layout and switching scheme of current sources of the DAC is proposed to reduce the mismatch between the current sources for better accuracy and glitch while switching respectively. The prototype is fabricated in 0.35um two-poly three-metal CMOS technology and measurement results show maximum DNL of +0.45/-0.326 LSB and integral non-linearity INL of +1.085/-0.7836 LSB for 3.3v supply voltage. The total power consumption of the DAC is 3.39mW and active core area of the DAC is 0.52mm2.

Item Type:	Conference or Workshop Item (Paper)
Uncontrolled Keywords:	DAC, INL, DNL, current steering, segmented architecture,
Subjects:	?? TK ?? Semiconductor Devices > IC Design
Divisions:	Semiconductor Devices
Depositing User:	Mr. Rohit Singh
Date Deposited:	05 Apr 2013 09:49
Last Modified:	20 May 2013 06:34
URI:	http://ceeri.csircentral.net/id/eprint/31

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