Items where Author is "Goel, T"

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Conference or Workshop Item

Pandey, JG and Goel, T and Karmakar, A (2019) A High-performance and Area-efficient VLSI Architecture for the PRESENT Lightweight Cipher. In: 17th international Conference on Embedded Systems & 31st International Conference on VLSI Design, Jan. 6-10, 2018, Pune, Maharashtra. (Submitted)

Pandey, JG and Goel, T and Karmakar, A (2017) An Efficient VLSI Architecture for PRESENT Block Cipher and its FPGA Implementation. In: 21st VLSI Design and Test Symposium (VDAT-2017), 29 June 2017 - 02 July 2017, Roorkee. (Submitted)

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